1. Field of the Invention
The present invention relates to a method for controlling a plurality of interrupts with different priorities thereof being defined, an interrupt controlling apparatus and program.
2. Description of the Related Art
In a computer furnished with a plurality of hardware devices, interrupt control is performed to receive processing requests from the respective hardware devices. Such interrupts are usually defined by priorities for executing in the order of the defined priority.
In a system where a plurality of hardware devices having similar functions share separate interrupt resources, if the respective hardware devices are given different priorities vis-á-vis interrupts, the frequencies of execution may vary a great deal despite each hardware device having a similar function, because the processes are executed in accordance with the defined priorities. In an extreme case, processing for a low priority hardware device may not be executed at all.
On the other hand, if each hardware device is allocated the same priority vis-á-vis interrupt, a hardware device causing an interrupt cannot be identified until the status of each hardware device is confirmed, necessitating confirmation of status information of all the hardware devices which have not caused the interrupt as well. Reading the status information of hardware devices consumes a great deal of processing time, hence causing the problem of decreased processing efficiency of a system.
With regard to control of interrupt processing corresponding to a plurality of interrupting causes, Japanese unexamined patent application publication No. 2002-55830 notes a method in which interrupt causes are divided into groups in accordance with urgency and an interrupt signal is outputted by the unit of the group, for example.